In fabricating an integrated circuit, apertures, windows or vias are often formed in a layer of insulator material in order to provide a contact to a second layer to electrically connect the second layer to a third layer that is on an opposite side of the insulator layer. Because real estate is precious on a semiconductor device, the dimensions of these apertures are often made as small as fabrication limitations allow. It is necessary to precisely control the diameter of any aperture that is formed in a layer.
A conventional technique for forming an aperture through an insulator layer to provide access to a lower level conductive layer is to apply or spin a photoresist to the insulator layer and to pattern the photoresist using a photolithographic mask to expose regions of the insulator layer. Plasma etching or reactive ion etching then removes material from the insulator layer, forming apertures at the exposed regions. After removal of the photoresist, a conductive material is deposited within the apertures to electrically connect with the lower level conductive layer. Various factors limit the minimum horizontal dimension of an aperture formed in this manner. For example, aperture size is limited by the resolution of the lithography. In addition to problems involving the size of the aperture, there can be problems with misalignment to the lower conductive layer. Optimally, formation of the apertures during fabrication of a semiconductor device should allow rework if the apertures are inaccurately placed or are formed outside of acceptable dimensional tolerances.
U.S. Pat. No. 4,910,168 to Tsai teaches that contacts through an insulator layer can be formed without etching the layer. Originally the layer is a conductive polysilicon layer, but subsequent processing oxidizes the polysilicon layer other than at contact regions. The oxidation converts the conductive polysilicon to an insulating material, other than at the contact regions. While this method offers advantages over the conventional technique, the advantages are available only in semiconductor applications in which the oxidized doped polysilicon possesses the specific structural and electrical properties of the particular application.
The object of the present invention is to provide a method for controlling the horizontal dimension of an aperture in an insulator layer and for reducing a contact to a size which could not otherwise be achieved because of the limits of lithography, wherein the aperture provides access to a lower conductive layer.